Technical / research

Researchers from The University of California, Berkeley, designed a new versatile compact RRAM model that can model different types of RRAM devices such as oxide-RRAM (OxRAM) and conducting-bridge-RRAM (CBRAM). 

The researchers say that their new model unifies the switching mechanisms of these RRAMs into a single framework. The researchers showcase the model’s accuracy in reproducing published experimental device DC and transient characteristics of various RRAM structures. They also demonstrated the model’s efficacy in capturing RRAM variability and conducting 1T1R circuit simulations.

In 2017, Australia-based RRAM developer 4DS Memory signed an agreement with Belgium-based IMEC to develop a transferable manufacturing process for its technology. 4DS now announced that it has renewed its R&D collaboration with the IMEC research institute after receiving positive results from its fourth lot of test chips.

4DS will pay IMEC 1.92 million Euro for the activities in 2024, and the company expects IME to deliver its 5th and 6th batch of 1 Mbit array chips in Q3 2024. The 6th batch will be based on a 20 nm process. 

US-based Tetramem published a paper that shows its form of RRAM-powered analog computing is capable of executing calculations with arbitrary precision. It says the ability to perform high-precision multiplication within single electronic devices that can be readily formed in arrays offers scope to reduce the power consumption of machine learning when based on artificial neural networks.

The Tetramem device is made of a mixture of Al3O2, above a layer of HfO2 sandwiched between a tantalum/titanium top electrode and a platinum bottom electrode. Each of the bilayers is less than 1nm thick so that after being laid down they appear to form a mixed layer rather than two separate continuous layers. The device was fabricated in a 240-nm diameter via above the CMOS peripheral circuitry.

Researchers from Kyushu University and the National Taiwan Normal University developed a new RRAM device, readable through both electrical and optical methods. The device is based on perovskite quantum dots that enable to simultaneously store and visually transmit data.

By integrating a light-emitting electrochemical cell with a resistive random-access memory that are both based on perovskite, the team achieved parallel and synchronous reading of data both electrically and optically in a ‘light-emitting memory.’

The project NEUROTEC (“Neuro-inspired artificial intelligence technologies for the electronics of the future”) was launched in November 2019 to develop innovative "Beyond von Neumann" concepts for highly energy-efficient devices. The two-year project shows the great potential of a future neuromorphic computer.

The project aims to fuse two major technologies - machine learning and artificial neural networks (ANNs) and memristive materials and devices - especially redox-based RRAM and phase change memories (PCM). The project's mandate is to develop a full-range of basic technologies ranging from dedicated material deposition technologies, integration technologies, measurement technologies, the development of simulation and modelling tools, up to the design and realization of novel AI circuits.

Researchers from the University of Groningen combined graphene with a perovskite ferroelectric material to design a new memristor device.

In the device, a graphene strip was placed on top of a flake of STO (strontium titanium oxide perovskite). The graphene strip addition enabled the usage of the STO material at higher temperatures than before. This research creates new insights into the adoption of STO materials in memristor devices.

Researchers from Korea's Pohang University of Science & Technology (POSTECH) has designed a halide perovskite material for RRAM memory devices. The perovskite material offers low-operating voltage and high-performance resistive switching memory.

The researcher say they have succeeded in designing an optimal halide perovskite material (CsPb2Br5) that can be applied to a ReRAM device by applying first-principles calculation based on quantum mechanics.

Singapore's Nanyang Technological University (NTU Singapore) and GlobalFoundries announced a partnership to jointly research next-generation RRAM memories. The two partners will invest $88 million USD with an aim to demonstrate RRAM memory devices produced on 12-inch wafers.

NTU and GF-Singapore are already collaborating on spintronics - the study of electron spin and its applications, including MRAM memory (NTU and GF are founding members of the Singapore Spintronics Consortium. In this new ReRAM project, 16 researchers will work together to research areas such as circuit design for next-generation smart devices and chip packaging for advanced IoT applications.

Israel-based SiOx RRAM developer Weebit Nano has signed an agreement to collaborate with the Technion Institute in Israel. Weebit will work together with a team of researchers to examine the possible use of ReRAM devices in processing-in-memory that could speed up processing, memory transfer rate and memory bandwidth and decrease processing latency – while using less power.

Weebit and the Technion will also perform characterisation and implementation of logic operations using Weebit’s RRAM test chips, demonstrating basic logic operations on a RRAM array

Israel-based SiOx RRAM developer Weebit Nano launched a joint Neuromorphic ReRAM project with
Politecnico di Milano (Polimi). Weebit Nano's team will collaborate with researchers from the Poltecnico to test, characterize and implement its developed algorithms using Weebit’s ReRAM chip. The goal of the project is to demonstrate the capability of ReRAM-based hardware in neuromorphic and artificial intelligence applications.

This is the second Neuromorphic RRAM project that Weebit launches - only recently in November 2018 it announced that it will partner in a similar project with the Non-Volatile Memory Research Group of the Indian Institute of Technology Delhi (IITD).