RRAM-Info: the RRAM experts

Israel-based RRAM developer Weebit Nano announced that together with its partner CEA-Leti, it has demonstrated production-level parameters of its RRAM technology in a 28nm process.

The company says that it has tested, characterized and measured functional 1 Megabit (Mb) ReRAM arrays in a 28nm process technology on 300mm wafers. The testing demonstrated the robustness of Weebit's ReRAM technology with results showing very good endurance and data retention alongside other production-level quality parameters.

RRAM developer CrossBar announced (in July 2021) a new application of its RRAM technology for use as a physical unclonable function (PUF) in order to generate cryptographic keys in secure computing applications.

CrossBar's RRAM has been historically utilized as non-volatile semiconductor memory, but it is now being introduced for use in hardware security. The company says its solution can enable a more secure and cost-effective class of devices and systems.

Israel-based RRAM developer Weebit Nano has entered into its first commercial deal with US-based semiconductor foundry SkyWater Technologies. The deal includes a technology transfer agreement and a non-exclusive licensing agreement.

Weebit's ReRAM technology will be transferred to SkyWater’s production fab and then qualified for volume production by the end of 2022.

Researchers from Kyushu University and the National Taiwan Normal University developed a new RRAM device, readable through both electrical and optical methods. The device is based on perovskite quantum dots that enable to simultaneously store and visually transmit data.

By integrating a light-emitting electrochemical cell with a resistive random-access memory that are both based on perovskite, the team achieved parallel and synchronous reading of data both electrically and optically in a ‘light-emitting memory.’

The project NEUROTEC (“Neuro-inspired artificial intelligence technologies for the electronics of the future”) was launched in November 2019 to develop innovative "Beyond von Neumann" concepts for highly energy-efficient devices. The two-year project shows the great potential of a future neuromorphic computer.

The project aims to fuse two major technologies - machine learning and artificial neural networks (ANNs) and memristive materials and devices - especially redox-based RRAM and phase change memories (PCM). The project's mandate is to develop a full-range of basic technologies ranging from dedicated material deposition technologies, integration technologies, measurement technologies, the development of simulation and modelling tools, up to the design and realization of novel AI circuits.

Israel-based RRAM developer Weebit Nano announced that it completed the design and the tape-out of its first embedded RRAM module. This integrated test-chip will be used as the final platform for testing and qualification, ahead of customer production.

Weebit says that it has used its patent-pending analog and digital smart circuitry to significantly enhance the array's technical parameters, including speed, retention and endurance. The test chip comprises a full sub-system in which the module is embedded, enabling potential customers to use it as a development and prototyping platform for new products such as low-energy IoT devices.

Israel-based RRAM developer Weebit Nano announced that it has developed the world's first commercial integration of an oxide-based ReRAM (OxRAM) cell with an ovonic threshold switching (OTS) selector. Weebit says that this is a critical step in the company's commercialization path for the discrete (standalone) memory market (which they hope to achieve by 2024).

The selector is a key element in a memory chip as it enables optimized cell access within the memory array. Weebit developed the technology for the integration together with its development partner CEA-Leti. Weebit says that this technology will broaden its target market beyond embedded memory to include discrete memory technology. In future architectures, the company aims to implement 3D memory stacking and crossbar architectures.