RRAM-Info: the RRAM experts

Israel-based SiOx RRAM developer Weebit Nano has signed an agreement to collaborate with the Technion Institute in Israel. Weebit will work together with a team of researchers to examine the possible use of ReRAM devices in processing-in-memory that could speed up processing, memory transfer rate and memory bandwidth and decrease processing latency – while using less power.

Weebit and the Technion will also perform characterisation and implementation of logic operations using Weebit’s RRAM test chips, demonstrating basic logic operations on a RRAM array

Israel-based SiOx RRAM developer Weebit Nano launched a joint Neuromorphic ReRAM project with
Politecnico di Milano (Polimi). Weebit Nano's team will collaborate with researchers from the Poltecnico to test, characterize and implement its developed algorithms using Weebit’s ReRAM chip. The goal of the project is to demonstrate the capability of ReRAM-based hardware in neuromorphic and artificial intelligence applications.

This is the second Neuromorphic RRAM project that Weebit launches - only recently in November 2018 it announced that it will partner in a similar project with the Non-Volatile Memory Research Group of the Indian Institute of Technology Delhi (IITD).

Weebit Nano reported successful endurance results of its ReRAM cells as a key step towards moving to 300mm wafers at 28nm. Weebit says that its ReRAM cells demonstrated stable voltage levels and endurance, at levels competitive to production non-volatile memories.

Weebit, together with its partner Leti, performed the tests which demonstrated Array-level endurance above 100,000 cycles. The company says that final characterisation will continue over coming weeks on array performance and extended endurance and retention in preparation for the migration to 300mm wafers at 28nm.

Israel-based SiOx RRAM developer Weebit Nano announced a new development program partnership with chip-design software developer Silvaco to develop a Technology Computer-Aided Design (TCAD) solution to accurately model the electrical behavior of Weebit Nano’s ReRAM devices.

Weebit says that this new collaboration will accelerate the incorporation of Weebit Nano’s ReRAM modules into advanced semiconductor designs. Silvaco will use the developed model as the basis for creating a TCAD solution for joint customers employing ReRAM technology.

Israel-based RRAM developer Weebit Nano announced that its partnership with Leti continues, and Leti and Weebit extended the partnership to include adapting Weebit's RRAM production process to 300 mm wafers, at 28 nm.
Up until now Leti and Weebit's development was done on 200 mm wafers using 40 nm technology. Weebit believes that the move to 300 mm and 28 nm will be quick - and it will be done by the end of Q4 2019. The move to 28 nm will improve Weebit's RRAM cells and enable them to fit even the smallest geometries being used in the market today.

Market analyst firm Yole Developpement presents its latest next-generation memory forecasts in an interesting new article. The company says that following more than 15 years of development, PCM is finally taking off in stand-alone applications due to strong support from Intel and Micron.

While STT-MRAM is expected to lead the embedded memory race, Yole says that Stand-alone RRAM will try to catch market share to PCM on SCM application. RRAM was actually expected to be the first stand-alone technology to compete with 3D XPoint, but it has suffered repeated delays due to technical challenges. Yole expects RRAM to "return to the race for SCM" after 2020, and possibly start competing with NAND for mass storage applications.

Strategic Elements announces has signed an agreement with the University of New South Wales (UNSW) to further optimize the company's Nanocube Memory Ink flexible/transparent RRAM technology. UNSW and SER will also develop demonstrator applications for the new technology.

UNSW will begin the research by assessing potential demonstrator applications in areas such as multi-functional capacitive sensors that can detect the type and strength of external stimuli including curvature, pressure, strain, and touch with clear distinction. It will also look into developing memory arrays that will fulfill the growing requirement for local digital data storage on flexible sensors, tags, wearables and high value consumer packaging.