RRAM-Info: the RRAM experts

RRAM-Info is a news hub and knowledge center for Resistive RAM technologies.

Resistive RAM is a non-volatile computer memory that uses materials that change their resistance - or memristors. RRAM is still in its early stages, but it may enable fast, efficient and small memory chips

Recent RRAM News

New RRAM book: In Search of the Next Memory: Inside the Circuitry from the Oldest to the Emerging Non-Volatile Memories

This book aims to provide an introduction to promising emerging memories under development. The book's target audience is the chip designer, and it offers expanded, up-to-date coverage of emerging memories circuit design.

The book covers four main next-gen technologies: RRAM, MRAM, FeRAM and PCRAM and explores the array organization, sensing and writing circuitry, programming algorithms and error correction techniques.

Researchers produce a CBRAM device using only a standard inkjet printer

Apr 07, 2017

Researchers from the Munich University of Applied Sciences in Germany managed to produce RRAM (CBRAM) devices using a standard inkjet printer (FujiFilm Dimatix DMP 2831) without any additional processing steps such as electroplating or lithography. The researchers say that the memory devices have a performance comparable to regular RRAM devices created in a clean-room process.

To create these memory cells, the researchers used three different inks: silver nanoparticles, spin-on-glass (liquid glass) and PEDOT:PSS. The silver created the conductive layer, the spin-on-glass was the insulating layer and the PEDOT:PSS was also used to create conductive layers. The memory device was printed on a cheap and flexible plastic foil.

hexagonal-BN enables 2D RRAM devices

Mar 10, 2017

Researchers from Soochow University in China in collaboration with researchers form Havard, Stanford and MIT developed RRAM memory devices using multilayer hexagonal boron nitride (h-BN) as dielectric. The devices show promising performance - while being based on a 2D material, which may pave the way towards extremely thin and efficient memory devices.

h-BN enables a 2D RRAM device image

2D materials (such as h-BN and others) are interesting to many researchers, and the field is experiencing a boom following the "discovery" of graphene in 2004.

Western Digital licenses ReRAM technology from Rambus

Mar 08, 2017

Rambus logoRambus announced that it signed a broad patent license agreement with western digital. The agreement covers the use of several memory technologies - including memory architectures, high speed interfaces, security technologies and ReRAM.

Rambus did not provide any more details, but the agreement will last until 2021 with an option for an additional 5-year extension.

Panasonic and UMC to co-develop and produce RRAM chips by 2019

Feb 01, 2017

Panasonic announced a new partnership with Taiwan-based United Microelectronics Corp (UMC) to co-develop and produce RRAM devices. The two companies aim to use a 40nm process to produce RRAM chips that consume one-seventh the power of today's NAND flash memory.

Panasonic will be in charge of designing the chips, and the two companies will co-develop the microfabrication technologies. Actual production will be done at UMC. The two companies plan to start shipping samples in 2018 and mass produce RRAM chips by 2019. The first RRAM devices will be embedded in microcontrollers.

Crossbar starts to sample RRAM chips at SMIC

Jan 22, 2017

Crossbar logoIn March 2016 Crossbar announced its strategic partnership with Semiconductor Manufacturing International Corporation (SMIC) to co-develop and produce RRAM technologies. Crossbar now says it started to sample embedded RRAM chips from SMIC.

SMIC, China's largest semiconductor foundry, is using a 40nm process, and Crossbar says that it plans for a 28nm process - and even 10nm or lower down the road. The chip design uses non-conductive amorphous silicon (a-SI) technology. Crossbar's chips can either use a 1T1R architecture (1 transistor per RRAM, which offers the lowest latency and so useful for embedded memory and caching) or 1TnR (which uses up to 2,000 cells per transistor using a crossbar scheme - which makes for higher density chips useful for storage).