RRAM-Info: the RRAM experts

Crossbar announced a partnership with Mobiveil, a supplier of silicon IP, platforms and IP-enabled design services to apply Mobiveil complete PCIe to NVMe set of solid state drive (SSD) IP to support Crossbar's RRAM IP blocks.

Mobiveil and Cross will work together on a new RRAM-based design from Mobiveil’s complete PCIe-to-NVMe set of SSD IP with Crossbar’s RRAM enabling six-million 512B IOPS below 10us latency. Crossbar says that the performance gain will enable RRAM-based SSDs to significantly speed up access to frequently requested information in large data centers.

In March 2016 Crossbar announced its strategic partnership with Semiconductor Manufacturing International Corporation (SMIC) to co-develop and produce RRAM technologies. In January 2017 Crossbar announced that it started sampling RRAM chips.

In an interesting interview with Electronic Design, Crossbar's Vice President of Strategic Marketing & Business Development, Sylvain Dubois, discloses that Crossbar has started to ramp up production, and has signed a dozen agreements to license its technology to MCU/SoC companies. Crossbar's current developments are targeting embedded ReRAM IPs integrated in MCUs/SoCs for IoT, consumer electronics, artificial intelligence, and industrial applications.

Researchers from the NIST in the US have found that short, weak energy pulses can be used to change RRAM states. This method is much more efficient and reliably than current switching techniques.

The researchers explain that current RRAM devices use single relatively high-energy pulses in order to switch the state (on / off, or 1 / 0). This is an unreliable method. The researchers have now discovered that short pulses (only 100 picoseconds in total), even very weak ones, are useful to switch the state.

Researhcers at Stanford and MIT developed a new 3D chip fabrication method that combines a CNT-based processor with RRAM memory cells. This technology can be used to create 3D chip architectures in a way that is not possible with silicon-based chips.

Both CNT-based logic and RRAM memory components can be deposited at relatively low temperatures (around 200 degrees Celsius) as opposed to silicon which requires 1,000 degrees to deposit. This means that you can place one layer on top of the other without damaging either layers.

Researchers at Moscow's Institute of Physics and Technology (MIPT) developed a method of depositing the functional layers of an RRAM memory cell using high quality ALD coating. The researchers report that ALD enables a controllable growth of oxygen deficient oxides.

The MIPT researchers used production-proven ALD equipment made by Picosun. The researchers now want to see whether the ALD process can be scaled to an industrial-scale production process.

According to reports, Taiwan Semiconductor Manufacturing Company (TSMC) is aiming to start producing embedded RRAM chips in 2019 using a 22 nm process. This will be initial "risk production" to gauge market reception.

TSMC also aims to start embedded MRAM chip production in 2018.

Researchers from Soochow University in China developed a 2D RRAM device structure based on sheets of graphene and hexagonal boron nitride (hBN). The device uses a Graphene/hBN/Graphene structure and it features excellent overall fitting results.

This is still just a theoretical model, but it may prove to be the basis of high performance RRAM devices.