Strategic Elements scales up Nanocube Memory Ink production

Strategic Elements announced that it has successfully produced a large-scale batch of its Nanocube Memory Ink with around 400 times the volume of previous batches. Previously the researchers were only able to produces batches in the milliliter range, but now a new method was developed to produces batches of Nanocube Ink in the liter scale.

Strategic Elements memory ink photo

Strategic Elements also updates that it is initiating a new program with the Finnish VTT Technical Research Centre to analyse and optimise the memory ink film thickness and device operation and performance. The company is also negotiating a new agreement with UNSW that will potentially include trial depositions of the Nanocube Ink on the advanced slot die printing equipment recently acquired by UNSW.

Teledyne HiRel Electronics adopts Adesto's CBRAM memory technology

Adesto Technologies announced that Teledyne HiRel Electronics will use Adesto's resistive RAM (CBRAM) memory technology for use in its high-performance, high-reliability semiconductor solutions. Teledyne already offers Adesto's CBRAM chips in 32KB, 64KB, 238KB and 512 KB densities. The company says that these chips offer 100K write cycle endurance and data retention of greater than 40 years at 125°C.

Adesto CBRAM chips

Teledyne HiRel Electronics markets its products into civil aerospace, industrial, medical, defense, scientific and space applications, and the company says that the CBRAM memory offers unique advantages to high-reliability applications as it is highly efficient and resistant to the effects of radiation.

Crossbar and Mobiveil to support Crossbar's RRAM IP on Mobiveil's solid-state storage IP

Crossbar logoCrossbar announced a partnership with Mobiveil, a supplier of silicon IP, platforms and IP-enabled design services to apply Mobiveil complete PCIe to NVMe set of solid state drive (SSD) IP to support Crossbar's RRAM IP blocks.

Mobiveil and Cross will work together on a new RRAM-based design from Mobiveil’s complete PCIe-to-NVMe set of SSD IP with Crossbar’s RRAM enabling six-million 512B IOPS below 10us latency. Crossbar says that the performance gain will enable RRAM-based SSDs to significantly speed up access to frequently requested information in large data centers.

Crossbar ramps up 40nm RRAM production, signs-up 12 MCU/SoC companies as licensees

Crossbar logoIn March 2016 Crossbar announced its strategic partnership with Semiconductor Manufacturing International Corporation (SMIC) to co-develop and produce RRAM technologies. In January 2017 Crossbar announced that it started sampling RRAM chips.

In an interesting interview with Electronic Design, Crossbar's Vice President of Strategic Marketing & Business Development, Sylvain Dubois, discloses that Crossbar has started to ramp up production, and has signed a dozen agreements to license its technology to MCU/SoC companies. Crossbar's current developments are targeting embedded ReRAM IPs integrated in MCUs/SoCs for IoT, consumer electronics, artificial intelligence, and industrial applications.

Researchers show that short weak pulses can be used to switch RRAM states

Researchers from the NIST in the US have found that short, weak energy pulses can be used to change RRAM states. This method is much more efficient and reliably than current switching techniques.

RRAM switching states (NIST)

The researchers explain that current RRAM devices use single relatively high-energy pulses in order to switch the state (on / off, or 1 / 0). This is an unreliable method. The researchers have now discovered that short pulses (only 100 picoseconds in total), even very weak ones, are useful to switch the state.

Researchers combine RRAM and logic in a single 3D CNT chip

Researhcers at Stanford and MIT developed a new 3D chip fabrication method that combines a CNT-based processor with RRAM memory cells. This technology can be used to create 3D chip architectures in a way that is not possible with silicon-based chips.

Both CNT-based logic and RRAM memory components can be deposited at relatively low temperatures (around 200 degrees Celsius) as opposed to silicon which requires 1,000 degrees to deposit. This means that you can place one layer on top of the other without damaging either layers.

Researchers use ALD coating tech to successfully deposit RRAM functional layers

Researchers at Moscow's Institute of Physics and Technology (MIPT) developed a method of depositing the functional layers of an RRAM memory cell using high quality ALD coating. The researchers report that ALD enables a controllable growth of oxygen deficient oxides.

The MIPT researchers used production-proven ALD equipment made by Picosun. The researchers now want to see whether the ALD process can be scaled to an industrial-scale production process.