Australia-based RRAM developer dorsaVi announced that it has begun to test its first RRAM structure, to measure the energy required to update memory states. The company says that this work is intended to establish an initial energy-performance benchmark for dorsaVi’s low-power hardware pathway before more comprehensive testing with its RRAM Validation Chip.
dorsaVi says that it sees physical AI, including advanced robotics, autonomous systems and adaptive wearables, as a potential application area where local memory and processing could reduce the need to send all raw sensor data to a distant processor.
The evaluation focuses on device-level energy associated with changing RRAM memory states, a characteristic that may become increasingly relevant where memory is updated frequently close to sensing functions. dorsaVi cautions that the measurements will not represent the full power consumption of an AI system, which would also include sensing, logic, communications, actuation, and other components. The planned Validation Chip program will extend the work towards array-level operation and future CIM evaluation alongside further reliability and workload-level assessment.
In July 2026, dorsaVi began physical manufacturing of its first RRAM-CMOS validation chip, producing the transistor and circuit-level structures needed to support the RRAM memory array.
